Portable FP4 Quantization for Heterogeneous Accelerators

Abstract

MXFP4, NVFP4 and vendor variants differ in blocks, scales, outliers and instructions, making platform-specific artifacts difficult to move without quality or performance losses. TransFP4 introduces hardware-independent microscaling IR, blockwise orthogonal shaping, sparse residual channels and FP4/INT4 candidates, then binds physical formats at deployment using native support, fused conversion, traffic and kernel costs. Numerical experiments on 131,072-dimensional heavy-tailed synthetic tensors with 1% activation outliers yield NMSE 0.00460, 84.15%, 44.92% and 82.91% below MXFP4, NVFP4 and INT4, with cosine similarity 0.99771. An analytical backend model gives normalized costs of 1.06, 1.05 and 1.08 on NVFP4-, MXFP4- and INT4-native platforms. The study argues for joint distribution, format, fusion and conversion decisions rather than one numeric format alone.

Decode repeatedly reads weights, making bit width critical to capacity, bandwidth and energy. INT8, INT4 and weight quantization are established approaches^{[2][3][4][5][6][7][8][9]}, but native FP4 makes numeric formats a joint algorithm/compiler/hardware concern. OCP microscaling expands narrow floating-point range with shared block scales^[11][12]; NVFP4 uses 16-element E2M1 blocks, E4M3 scales and a global scale^[13]; AMD CDNA 4 supports standard microscaling including MXFP4^[14]. Equal element widths do not mean binary compatibility: blocks, scale codebooks, rounding, scale levels and instructions differ. MR-GPTQ demonstrates format-specific rotations and quantization^[15], Diagnosing FP4 identifies uneven layer/projection sensitivity^[16], and MixFP4, M2XFP and AdaMX recover precision through mixed codebooks or metadata^[17][19][20]. Format-bound artifacts need recalibration or requantization across platforms, while universal INT4 misses native FP4 throughput. TransFP4 preserves hardware-independent shaping, block-level format intent and optional residuals until backend binding. Contributions include a common IR, shaped/residual candidates, joint accuracy/bit-width/conversion/kernel objectives, and synthetic numerical plus analytical backend evaluation.

1. FP4 formats and portability

1.1 Microscaling

For block x=(x₁,…,xG) of length G, element format f, block scale sb and optional global scale s_g, quantization is:

Q_f maps normalized values to E2M1, INT4 or another narrow codebook. Shared scales carry dynamic range; element codes carry relative precision. Smaller blocks localize outliers but increase metadata, loading and broadcasts. MXFP4 commonly uses 32-element blocks and E8M0 power-of-two scales, simplifying multiplication but adding scale-rounding mismatch. NVFP4's 16-element blocks, E4M3 and global scales improve fitting with more complex dequantization^{[11][12][13][14][15]}.

Figure 1. FP4 formats and the TransFP4 description

Table 1. Differences among 4-bit formats

1.2 Low-bit floating point is not a drop-in integer replacement

INT4 methods often smooth channels, relocate outliers or rotate distributions^{[4][6][7][32]}. Rotations reduce maxima for uniform integer grids, but MXFP4's power-of-two scales may cause more blocks to cross scale boundaries after energy spreads. MR-GPTQ uses within-block rather than global rotation^[15], and BATQuant emphasizes block optimization^[22]. NVFP4 localizes outliers in smaller groups, but this can weaken the benefit of spreading them across channels. The same preprocessing can have opposite effects across formats.

Figure 2. Normalized E2M1 and INT4 code points

E2M1 spacing is nonuniform, unlike scaled INT4. Uniform-grid assumptions can misestimate FP4 sensitivity in rounding, reconstruction and error compensation. FAAR, M2XFP and MixFP4 explore format-aware rounding, metadata and mixed codebooks^[17][20], but generally retain encoding-specific artifacts. TransFP4 preserves reinterpretable quantization intent rather than introducing one universal FP4 format.

1.3 Portability constraints

Portability has three levels: numerical lowering across block sizes/scales without repeating all layer optimization; execution that fuses scales, residuals and tags into GEMM/GEMV/attention without materializing high precision; and evaluation using common quality, memory, kernel and conversion metrics. Offline perplexity alone is insufficient.

Table 2. Quantization methods and hardware coupling

2. TransFP4 design

2.1 Pipeline

Five stages cover profiling, shaping, block candidates, IR serialization and backend lowering. Offline work uses tensors, limited calibration activations and abstract formats, independent of vendor instructions. Deployment reads native codebooks, tile shapes, scale loading, fusion, bandwidth and conversion throughput to select encoding. Like compiler lowering, it separates semantics from instructions while retaining quantization error and recovery paths.

Figure 3. Quantization and backend late binding

2.2 Format IR

Each logical quantization block is represented as bj=〈Gj,Cj,Sj,Rj,Πj,Ωj〉.Gj is logical block size; Cj lists candidate codebooks; Sj describes scale semantics rather than physical bits; Rj records residual indices and precision; Πj records absorbable orthogonal transforms and channel order; Ω_j stores calibration statistics, candidate errors, access frequency and operators. Backends may split blocks into two NVFP4 groups or merge into MXFP4 groups, selecting INT4 or higher-precision residuals if error limits are exceeded.

Table 3. TransFP4 IR fields

2.3 Block shaping and sparse residuals

For logical block xj, TransFP4 applies orthogonal matrix Hj to obtain yj=Hjxj. Since Hj preserves the L2 norm:

Equation (2) permits direct error comparison in the transformed domain. Block Hadamard avoids spreading outlier energy across many scale groups and can be absorbed into weights or fused as an activation butterfly. The largest r values enter a sparse residual stream while FP4/INT4 represents the main stream. Residuals are optional: fine NVFP4 scales may eliminate them, while MXFP4 or fallback paths may retain FP16/BF16 compensation.

P_r selects r residual positions. Outliers become a budgeted second stream rather than an implicit format responsibility. SqueezeLLM and OWQ demonstrate sparse high-precision compensation^[26][27]; TransFP4 records compensation and candidate codebooks together so backends can eliminate, fuse or change its precision.

2.4 Format search and lowering

Block j selects physical format fj, scale scheme sj, residual precision rj and kernel kj. The objective is:

ΔLj approximates error using second-order reconstruction, activation NMSE and sensitivity; Tj, Ej represent target latency and energy; Cj^convert includes conversion, scale reordering and metadata decoding; Beff limits effective storage width, while Rtask limits task risk. Search first prunes candidates by error, then allocates residual budgets with dynamic or integer programming. Four candidate classes—native FP4, native INT4, FP4 plus residuals and high precision—can keep compilation approximately linear in block count.

Figure 4. Example sensitivity by operator and depth

The normalized profile illustrates search inputs. Diagnostics find MLP up/down projections often more sensitive than attention projections, with sensitivity not confined to final layers^[16]. Rather than always preserve the last layers, TransFP4 combines operator, depth, outliers and curvature into risk budgets. Real calibration is required; the figure only illustrates nonuniform representation in IR.

2.5 Effective bits and fused conversion

For element width be, scale width bs shared by G elements and b_t tag bits per group, effective width is:

Figure 5. Block size and effective storage width

Smaller groups increase scale overhead, while block-amortized tags become cheaper as G grows. Metadata should be packed with weights and decoded during matrix loading rather than reread separately. Backends without mixed-codebook support select one native format to avoid per-block branching. Conversion should fuse with prefetching, unpacking or GEMM entry instead of materializing full BF16 intermediates.

3. Numerical experiments and analytical model

3.1 Scope

Tensor experiments test format, shaping and selection trends, not full-model accuracy or GPU throughput. Weights combine a Gaussian body with standard deviation 0.55 and sparse outliers; activations use Student-t with five degrees of freedom plus outliers. Each tensor has 131,072 elements with outlier rates 0, 0.1%, 0.3%, 1%, 3% and 6% and fixed seeds. All methods use block absmax and nearest rounding. TransFP4 uses 32-point Hadamard, at most one residual per 32 values and error-based NVFP4/INT4 selection.

Table 4. Tensor experiment setup

3.2 Metrics

NMSE=||x-x_hat||²₂/||x||²₂ normalizes amplitude; cosine similarity measures directional preservation. The backend model sets native matrix cost to one and adds decoding, reordering and conversion for nonnative formats. It omits chip frequency, cache behavior and scheduling noise, asking whether one logical artifact can remain near-native across three backends.

4. Results and analysis

4.1 Outlier sensitivity

Figure 6. Activation outliers and quantization error

MXFP4 and INT4 NMSE worsens with more outliers. NVFP4 remains steadier through small groups and E4M3 scales. Rotated MXFP4 improves heavy-tail errors but is similar to baseline without outliers, so rotation is not universally beneficial. TransFP4 achieves the lowest, flatter NMSE through shaping, candidates and residuals, consistent with format-aware FP4 research^[15][16][17] but not proof of equal gains in every layer or task.

Table 5. Representative heavy-tail results

At 1% activation outliers, TransFP4 NMSE is 0.00460, reductions of 84.14%, 44.92% and 82.90% versus MXFP4, NVFP4 and INT4. At 0.3% weight outliers, NMSE is 0.00519 and cosine similarity 0.99741. Residual candidates are not free accuracy: effective bits and backend movement must also be evaluated.

4.2 Backend portability

Figure 7. Normalized cost across native backends

Native execution costs one. Moving NVFP4 artifacts to MX and INT4 backends costs 1.28 and 1.75 due to regrouping and two-level decoding; MXFP4 on NV and INT4 costs 1.32 and 1.62. TransFP4 costs 1.06, 1.05 and 1.08 by selecting local codebooks and fusing residual/scaling work. These are structured assumptions, not GPU measurements, illustrating avoidance of expensive cross-format paths.

Table 6. Normalized backend costs

Portability does not mean identical physical bits everywhere. The reproducible logical artifact retains transforms, scales and residual budgets; deployment creates backend-specific packages through offline repacking without resampling calibration or repeating layer optimization. Distribution services can cache common packages with the logical artifact as a verifiable source.

4.3 Ablation and boundaries

Without shaping, heavy-tail scale pressure increases; without residuals, the method becomes blockwise FP4/INT4 selection; one codebook loses heterogeneity; ignoring conversion may select low-error but slow formats. Table 7 normalizes error/cost to isolate component contributions.

Table 7. Directional TransFP4 ablation

5. Compilation and validation roadmap

5.1 Compiler integration

TransFP4 can be a quantization dialect in MLIR, TVM or vendor compilers. Frontends produce logical blocks from weights, statistics and operators; middle passes absorb transforms and search scales/budgets; backends encode using capability tables. Weight Hadamard transforms can be absorbed offline; activation transforms fuse with RMSNorm, linear inputs or attention. Without native FP4, lower to INT4/W4A16 instead of emulating FP4 merely for format uniformity.

Kernel contracts specify K alignment, tiles, accumulation, scale loads, residual throughput and output types. NVIDIA Transformer Engine integrates NVFP4 scaling recipes and matrix interfaces^[13][34], while AMD CDNA 4 supplies block-scaled matrix instructions^[14][35]. A lowest-common-denominator abstraction would lose local fusion. Preserve multiple legal lowering rules and select through costs.

5.2 Correctness and auditable artifacts

Release records should include source-model hash, tokenizer/rotation settings, calibration summaries, layer errors, package-generator version, seeds and fallback formats. Deterministic manifests should identify each block's codebook, scale and residuals. Sensitive tasks may retain BF16 checkpoints or periodic high-precision checks against accumulated errors.

5.3 Limitations

Synthetic experiments do not cover real-model error propagation, perplexity, code or mathematics, and native fused kernels on B200, MI355X or other chips are not implemented. Analytical costs compare paths, not absolute products. Future evaluation should use common calibration on Llama, Qwen and reasoning models, measuring WikiText2, MMLU, GSM8K, code, long-context and multi-turn tasks alongside TTFT, throughput, power, package size and compilation. Mixed formats enlarge verification and control complexity; revert to one native format when overhead exceeds quality benefits.

6. Conclusion

FP4 is a hardware–software contract defined by codebooks, blocks, scales, outliers and matrix paths, not one interchangeable 4-bit type. TransFP4 preserves shaping, candidate codes, scale intent and residuals in hardware-independent IR for late binding. Synthetic tensors show lower NMSE and analytical models show near-native costs across NVFP4, MXFP4 and INT4. The central proposal is a portable numeric program that compilers can verify, lower and repack, rather than chip-bound static weights. Real models, native kernels and task correctness remain necessary validation, alongside research into training portable FP4 artifacts directly.

Portable FP4 quantization for heterogeneous accelerators

Abstract Native FP4 acceleration is emerging through mutually incompatible microscaling formats such as MXFP4 and NVFP4. Their block size, scale encoding, outlier behavior, and matrix instructions differ, so a quantized artifact optimized for one accelerator may require recalibration or expensive conversion on another. This paper presents TransFP4, a portable FP4 quantization framework with a hardware-independent format intermediate representation. It combines block-local orthogonal shaping, a sparse residual lane, and per-block FP4/INT4 candidate selection, while deferring the physical scale encoding and kernel choice to the deployment backend. The optimization jointly accounts for numerical distortion, effective bit width, kernel cost, energy proxy, and format-conversion overhead. In numerical experiments on 131,072-element synthetic heavy-tailed weight and activation tensors, at a 1% activation-outlier ratio, TransFP4 obtains an NMSE of 0.00460 and a cosine similarity of 0.99771, reducing NMSE by 84.15%, 44.92%, and 82.91% relative to MXFP4, NVFP4, and INT4, respectively. An analytical backend model gives normalized execution costs of 1.06, 1.05, and 1.08 on NVFP4-native, MXFP4-native, and INT4-native targets. These results are tensor-level numerical and analytical evidence rather than full-model hardware measurements. They indicate that portable low-bit deployment requires quantization, format description, conversion fusion, and backend lowering to be optimized together.

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